User manual INTEL 6700PXH 64-BIT PCI HUB MECHANICAL DESIGN GUIDELINES

[. . . ] R Intel® 6700PXH 64-bit PCI Hub Thermal/Mechanical Design Guidelines August 2004 Document Number: 302817-003 R INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO SALE AND/OR USE OF INTEL PRODUCTS, INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel may make changes to specifications, product descriptions, and plans at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined. " Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. [. . . ] TDP is the target power level that the thermal solutions should be designed to. Flip chip ball grid array (FC-BGA) packages have poor heat transfer capability into the board and have minimal thermal capability without a thermal solution. Intel recommends that system designers plan for a heatsink when using the PXH component. 3. 2 Die Case Temperature Specifications To ensure proper operation and reliability of the PXH component, the die temperatures must be at or between the maximum/minimum operating temperature ranges as specified in Table 3-1Table 31Table 3-1. System and/or component level thermal solutions are required to maintain these temperature specifications. Refer to Chapter 5 for guidelines on accurately measuring package die temperatures. Table 3-1. Intel® 6700PXH 64-bit PCI Hub Thermal Specifications Parameter Value Notes Tcase_max Tcase_min TDP Segment A @ 66 MHz and Segment B @ 66 MHz TDP Segment A @ 100 MHz and Segment B @ 100 MHz TDP Segment A @ 133 MHz and Segment B @ 133 MHz TDP Segment A @ 66 MHz and Segment B @ 100 MHz TDP Segment A @ 66 MHz and Segment B @ 133 MHz TDP Segment A @ 100 MHz and Segment B @ 133 MHz 105°C 5°C 9. 0 watts 8. 9 watts 8. 6 watts 8. 9 watts 8. 8 watts 8. 7 watts Note: These specifications are based on silicon characterization, however, they may be updated as further data becomes available. Intel 6700PXH 64-bit PCI Hub Thermal/Mechanical Design Guidelines ® 11 Thermal SpecificationsThermal Simulation R 12 Intel 6700PXH 64-bit PCI Hub Thermal/Mechanical Design Guidelines ® R 4 Thermal Simulation Intel provides thermal simulation models of the Intel® 6700PXH 64-bit PCI Hub component and associated user's guides to aid system designers in simulating, analyzing, and optimizing their thermal solutions in an integrated, system-level environment. The models are for use with the commercially available Computational Fluid Dynamics (CFD)-based thermal analysis tool "FLOTHERM"* (version 3. 1 or higher) by Flomerics, Inc. Contact your Intel field sales representative to order the Icepak thermal model and user's guide. Intel 6700PXH 64-bit PCI Hub Thermal/Mechanical Design Guidelines ® 13 Thermal SimulationThermal Simulation R 14 Intel 6700PXH 64-bit PCI Hub Thermal/Mechanical Design Guidelines ® R 5 Thermal Metrology The system designer must make temperature measurements to accurately determine the thermal performance of the system. Intel has established guidelines for proper techniques to measure the PXH die temperatures. Section 5. 1 provides guidelines on how to accurately measure the PXH die temperatures. 5. 1 Die Case Temperature Measurements To ensure functionality and reliability, the Tcase of the PXH must be maintained at or between the maximum/minimum operating range of the temperature specification as noted in Table 3-1Table 31Table 3-1. The surface temperature at the geometric center of the die corresponds to Tcase. Measuring Tcase requires special care to ensure an accurate temperature measurement. Temperature differences between the temperature of a surface and the surrounding local ambient air can introduce errors in the measurements. The measurement errors could be due to a poor thermal contact between the thermocouple junction and the surface of the package, heat loss by radiation and/or convection, conduction through thermocouple leads, or contact between the thermocouple cement and the heatsink base (if a heatsink is used). For maximum measurement accuracy, only the 0° thermocouple attach approach is recommended. 5. 1. 1 Zero Degree Angle Attach Methodology 1. Mill a 3. 3 mm (0. 13 in. ) diameter and 1. 5 mm (0. 06 in. ) deep hole centered on the bottom of the heatsink base. Mill a 1. 3 mm (0. 05 in. ) wide and 0. 5 mm (0. 02 in. ) deep slot from the centered hole to one edge of the heatsink. The slot should be parallel to the heatsink fins (see Figure 5-1Figure 5-1Figure 5-1). Attach thermal interface material (TIM) to the bottom of the heatsink base. Cut out portions of the TIM to make room for the thermocouple wire and bead. The cutouts should match the slot and hole milled into the heatsink base. Attach a 36 gauge or smaller calibrated K-type thermocouple bead or junction to the center of the top surface of the die using a high thermal conductivity cement. [. . . ] The reference thermal solution uses Chomerics* T-710, 0. 127 mm (0. 005 in. ) thick, 8 mm x 8 mm square. Note: Unflowed or "dry" Chomerics* T710 has a material thickness of 0. 005 inch. The flowed or "wet" Chromerics T710 has a material thickness of ~0. 0025 inch after it reaches its phase change temperature. 6. 5. 4. 1 Effect of Pressure on TIM Performance As mechanical pressure increases on the TIM, the thermal resistance of the TIM decreases. This phenomenon is due to the decrease of the bond line thickness (BLT). [. . . ]