User manual INFINEON TDA 16846-2 DATA SHEET VERSION1.3

[. . . ] For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Controller for Switch Mode Power Supplies Supporting Low Power Standby and Power Factor Correction TDA 16846 TDA 16846-2 Bipolar IC 1 1. 1 · · · · · · · · · · · · · Overview Features Line Current Consumption with PFC P-DIP-14-3 Low Power Consumption Stable and Adjustable Standby Frequency Very Low Start-up Current Soft-Start for Quiet Start-up Free usable Fault Comparators Synchronization and Fixed Frequency Circuits P-DSO-14-3 Over- and Undervoltage Lockout Switch Off at Mains Undervoltage Temporary High Power Circuit (only TDA 16847-2) Mains Voltage Dependent Fold Back Point Correction Continuous Frequency Reduction with Decreasing Load Adjustable and Voltage Dependent Ringing Suppression Time Ordering Code Q67000-A9377 Q67000-A9378 Q67006-A9430 Q67006-A9412 Q67040-S4494 Q67040-S4496 Q67040-S4495 Q67040-S4497 Package P-DIP-14-3 P-DIP-14-3 P-DSO-14-3 P-DSO-14-3 P-DIP-14-3 P-DIP-14-3 P-DSO-14-3 P-DSO-14-3 Type TDA 16846 TDA 16847 TDA 16846G TDA 16847G TDA 16846-2 TDA 16847-2 TDA 16846-2G TDA 16847-2G 1. 2 Description The TDA 16846-2 (this name is used in the description for all types) is optimized to control free running or fixed frequency flyback converters with or without Power Factor Correction (Current Pump). [. . . ] Figure 4 shows the start-up circuit and Figure 5 shows the voltage V14 during start up. Charging of C14 is done by resistor R2 of the "Primary Current Simulation" (see later) and the internal diode D1, so no additional start up resistor is needed. The capacitor C14 delivers the supply current until the auxiliary winding of the transformer supplies the chip with current through the external diode D14. 100 nF parallel to the electrolytic capacitor at pin 14 as shown in the application circuits in Figures 15, 16 , and 17. To avoid multiple pulses during start up in fixed frequency mode (danger of transformer saturation), the IC works in freerunning mode until the pulses at pin 3 (RZI) exceed the 2. 5 V threshold (only TDA 16846-2, TDA 16847-2). Figure 4 Startup Circuit Data Sheet 8 2003-07-31 TDA 16846 TDA 16846-2 Figure 5 Startup Voltage Diagram Primary Current Simulation PCS (Pin 2) / Current Limiting A voltage proportional to the current of the power transistor is generated at Pin 2 by the RC-combination R2, C2 (Figure 4). The voltage at Pin 2 is forced to 1. 5 V when the power transistor is switched off and during its switch on time C2 is charged by R2 from the rectified mains. The equation of V2 and the current in the power transistor (Iprimary) is : V 2 = 1, 5 V + L primary × I primary ------------------------------R2 × C2 Lprimary: Primary inductance of the transformer The voltage V2 is applied to one input of the On Time Comparator ONTC (see Figure 2). If V2 exceeds the control voltage, the driver switches off (current limiting). The maximum value of the control voltage is the internal reference voltage 5 V, so the maximum current in the power transistor (IMprimary) is : 3, 5 V × R 2 × C 2 I Mprimary = -------------------------------------L primary The control voltage can be reduced by either the Error Amplifier EA (current mode regulation), or by an opto coupler at Pin 5 (regulation with opto coupler isolation) or by the voltage V11 at Pin 11 (Fold Back Point Correction). Data Sheet 9 2003-07-31 TDA 16846 TDA 16846-2 Fold Back Point Correction PVC (Pin 11) V11 is derived from a voltage divider connected to the rectified mains and reduces the limit of the possible current maximum in the power transistor if the mains voltage increases. this limit is independent of the mains (only active in free running mode). The maximum current (IMprimary) depending on the voltage V11 at Pin 11 is : (4 V ­ V 11 / 3 ) × R 2 × C 2 I Mprimary = -----------------------------------------------------------L primary Off-Time Circuit OTC (Pin 1) Figure 6 shows the Off-Time Circuit which determines the load dependent frequency curve. When the driver switches off (Figure 7) the capacitor C1 is charged first by current I1L (approx. As soon as the voltage at pin 3 reaches the level V3L (2. 5 V), the charging current is switched to the higher value I1H (approx. The negative input is the pulsed output voltage from the auxiliary winding, divided by R31 and R32. The capacitor C3 is dimensioned only for delaying zero crossings and smoothing the first spike after switchoff. Smoothing of the regulation voltage is done with the soft start capacitor C4 at Pin 4. For primary regulation C4 is charged and discharged with pulsed currents. Figure 10 shows the voltage diagrams of the Error Amplifier circuit. Figure 9 Error Amplifier Figure 10 Data Sheet Regulation Pulse Diagram 13 2003-07-31 TDA 16846 TDA 16846-2 Fixed Frequency and Synchronization Circuit SYN (Pin 7) Figure 11 shows the Fixed Frequency and Synchronization Circuit. The circuit is disabled when Pin 7 is not connected or connected to pin 9 (Vref, to avoid noise sensitivity). The switching frequency is (charge time ignored) : f -------------R7 × C7 When the oscillator circuit is working the Fold Back Point Correction is disabled (not necessary in fixed frequency mode). "Switch on" is only possible when a "zero crossing" has occurred at Pin 3, otherwise "switch-on" will be delayed (Figure 12). 0, 8 Figure 11 Synchronization and Fixed Frequency Circuit Data Sheet 14 2003-07-31 TDA 16846 TDA 16846-2 Figure 12 Pulse Diagram for Fixed Frequency Circuit Synchronization mode is also possible. The synchronization frequency must be higher than the oscillator frequency. Figure 13 Data Sheet Ext. [. . . ] Unit Test Condition Unless otherwise stated, ­ 25 °C < Tj < 125 °C, VCC = 12 V Supply Voltage and Startup Circuit VCC (Pin 14) Overvoltage threshold Turn-ON threshold Turn-OFF threshold Delta-OV-V14 ON Supply current, OFF Supply current, ON V14 OV V14 ON V14 OFF ­ 15. 7 14. 5 7. 5 0. 5 ­ ­ 16. 5 15 8 ­ 40 5 17. 1 15. 5 8. 5 ­ 100 8 V V V V µA mA ­ ­ ­ I14OFF I14ON VCC = V14 ON -100 mV Output low Primary Current Simulation PCS (Pin 2) / Current Limiting Basic value Peak value Discharge current Bias current Pin 2 V2 V2 I2DC ­ 1. 45 4. 85 0. 6 1. 5 5 1. 0 1. 55 5. 15 2. 5 V V mA µA ­ 1. 0 ­ 0. 3 ­ I2 = 100 µA V11 = 1. 2 V V2 = 3 V V2 = 2 V Fold Back Point Correction PVC (Pin 11) Peak value Bias current Pin 11 Off-Time Circuit OTC (Pin 1) Charge current Charge current Peak value Basic value 1 Basic value 2 V5 ­ 3. 8 4. 1 4. 3 V µA ­ 1. 0 ­ 0. 3 ­ V11 = 4. 5 V V11 = 1. 5 V V1 Lower limit Bias current Pin 1 I1H I1L V1P V1B1 V1B2 V1L ­ 0. 9 0. 35 3. 38 1. 9 1. 44 1. 1 0. 5 3. 5 2 1. 5 80 1. 4 0. 65 3. 62 2. 1 1. 58 140 mA mA V V V mV µA V3 > V3L V3 < V3L ­ ­ ­ ­ 1. 1 ­ 0. 4 ­ V1 = 2. 2 V 2003-07-31 Data Sheet 20 TDA 16846 TDA 16846-2 5. 2 Parameter Characteristics (cont'd) Symbol Limit Values min. Unit Test Condition Unless otherwise stated, ­ 25 °C < Tj < 125 °C, VCC = 12 V Zero Crossing Input RZI (Pin 3) Zero crossing threshold (Pin 3) Delay to switch-on Bias current Pin 3 15 25 350 35 460 mV ns µA ­ ­ t3d ­ 250 ­2 ­ 1. 2 ­ V3 = 0 V Error Amplifier Input RZI (Pin 3) Input threshold (Pin 3) Bias current Pin 3 VEATH Low voltage threshold (Pin 3) V3L ­ 4. 85 2. 4 ­ 5 2. 5 5. 15 2. 6 V V µA ­ ­ ­ 0. 9 ­ V3 = 3 V Softstart and Regulation Voltage SRC (Pin 4) Soft-start charge current (Pin 4) Charge current Pin 4 Discharge current Pin 4 I4CHS I4CH I4DCH ­ 2. 5 ­ 1. 8 ­ 1. 2 µA -0. 9 0. 9 -0. 7 1. 4 -0. 5 1. 9 mA mA V4 = 2 V Opto Coupler Input OCI (Pin 5) Input voltage range (TDA 16846, TDA 16847) Input voltage range (TDA 16846-2, TDA 16847-2) Pull high resistor to VREF V5 V5 R1 0. 3 0 15 ­ ­ 20 6 6 28 V V k ­ ­ ­ Data Sheet 21 2003-07-31 TDA 16846 TDA 16846-2 5. 2 Parameter Characteristics (cont'd) Symbol Limit Values min. Unit Test Condition Unless otherwise stated, ­ 25 °C < Tj < 125 °C, VCC = 12 V Fixed Frequency and Synchronization Circuit SYN (Pin 7) Charge current Upper threshold Lower threshold Input voltage range Bias current Pin 7 I7 V7H V7L1 V7L2 ­ -0. 9 3. 4 1. 53 0. 4 -1. 3 3. 6 1. 6 -1. 6 3. 7 1. 67 6 mA V V V ­ ­ ­ ­ ­ 2. 4 ­ 1. 8 ­ 1. 1 µA V7 = 4 V Primary Voltage Check PVC (Pin 11) Threshold V11 0. 95 1 1. 06 V ­ Reference Voltage REF (Pin 9) Voltage at Pin 9 Current to enable FC2 V9 I9FC2 4. 8 ­ 18 5 ­7 5. 15 V µA I9 = ­ 100 µA Data Sheet 22 2003-07-31 TDA 16846 TDA 16846-2 5. 2 Parameter Characteristics (cont'd) Symbol Limit Values min. Unit Test Condition Unless otherwise stated, ­ 25 °C < Tj < 125 °C, VCC = 12 V Fault Comparator FC2 (Pin 6) HPC Threshold Bias Current Pin 6 V6 ­ 1. 12 1. 2 1. 28 V µA ­ ­ 1. 0 ­ 0. 3 0. 1 V6 = 0. 8 V Fault Comparator FC1 (Pin 10) Threshold Bias current Pin 10 V10 ­ 0. 95 0. 35 1 0. 65 1. 06 0. 95 V µA ­ V10 = 0. 8 V Power Measurement Output PMO (Pin 8, only TDA 16847, TDA 16847-2) Charge current Pin 8 Output Driver OUT (Pin 13) Output voltage low state Output voltage high state Output voltage during low V14 (TDA 16846, TDA 16847) Output voltage during low V14 (TDA 16846-2, TDA 16847-2) Rise time Fall time I8 ­ 110 ­ 100 ­ 90 µA I9 = ­ 100 µA V13 low 1. 1 V13 high 9. 2 V13 aclow 0. 8 V13 aclow 0. 5 1. 8 10 1. 8 1 2. 4 11 2. 5 1. 5 V V V V I13 = 100 mA I13 = ­ 100 mA I13 = 10 mA, V14 = 7 V I13 = 10 mA, V14 = 7 V C13 = 1 nF, V13 = 2 . . . [. . . ]